The Promises and Challenges of EUV at GlobalFoundries

One of the reasons I was so intrigued to visit GlobalFoundries earlier this month was for the opportunity to see an EUV lithography machine in place and to hear about how the firm plans to use it.

Not long ago, I had a chance to visit a factory in Connecticut where ASML builds many of the components for such an EUV machine. These enormous tools use extreme ultraviolet (EUV) light shone through a mask to delineate the lines for very small features of chips, and are some of the most complex machines in the world. They are designed to take the place of the now-standard immersion lithography machines that use light with a wavelength of 193nm in some layers of the chipmaking process.

To recap, an EUV machine is incredibly complicated. As George Gomba, Vice President of Technology Research for GlobalFoundries explained it, the process begins with a 27-kilowatt CO2 laser that is fired through a beam transport and focusing system onto tiny tin droplets (around 20 microns in diameter) produced by a droplet generator in a plasma vessel. The first pulse flattens the droplet and the second vaporizes it, creating laser-produced plasma (LPP). EUV photons emitted from the plasma are collected by a special mirror that reflects 13.5nm wavelength light and that radiation is transmitted to an intermediate focus point where it enters the scanner and is projected through a mask onto the silicon wafer. Gomba, who works out of the Albany Nanotech facility, said he has been working with preproduction EUV systems since 2013, and now expects EUV to be in full production at GlobalFoundries by the second half of 2019.

These tools are so complex that they require months of work just to get them ready to start production. At the company's Fab 8 in Malta, New York, I saw the first two EUV tools that have been installed; one is nearly complete and the other is in process production, and there is still room for two more.

Getting the EUV tools in the building itself was a complex operation. The main fab was first sealed off; then, a crane was installed in the ceiling, and a hole cut into the side of the building to move the massive new system inside. Then, of course, it had to be connected to the other tools in the factory. This involved work both in the sub-fab, which had to be set up for the source tool that creates the laser used in the process, as well as in the cleanroom itself. It all had to be done while keeping the rest of the fab running at full speed.

Tom Caulfield, SVP & General Manager of Fab 8, compared this to "doing heart surgery while running a marathon."

The Status of EUV—and What Still Needs to Be Solved

Gary Patton, CTO & SVP of Worldwide R&D for GlobalFoundries, said 7nm will be in risk production at Fab 8 this year, and full production next year, using immersion lithography and quad patterning, but not EUV. Multi-patterning takes longer because it involves more steps, and issues can arise due to the very precise alignment needed at each step, but these lithography tools are common, well-understood, and ready today. The plan is to later offer a version of the 7nm process using the new EUV tools.

EUV is "not ready today," Patton said, citing issues with source power, resist materials, and the masks, particularly with development of the proper pellicle (a thin film that goes over the mask or reticle.)

Currently EUV machines aren't as fast, with one engineer explaining that they can produce about 125 wafers per hour, compared to about 275 wafers per hour for immersion lithography. They can actually save time, because if the process reduces the number of passes for multi-patterning, it not only saves steps in lithography, but also in etching and preparation. Thus, EUV should actually cost less to run when it’s ready, Caulfield said.

Gomba noted that the idea is not just to reduce 3 or 4 layers of optical lithography, but to reduce many other steps as well, because between each lithography step, there is also etching and other processing on the wafer. The goal, Gomba said, is to reduce cycle time by up to 30 days.

The crossover point is probably quad patterning, but much depends on the yield (which should be improved, since EUV lithography steps should have less variability than multiple immersion lithography steps) and the cycle time improvements. EUV should also enable chip designers to operate under much less restrictive conditions.

But he too noted that there are some issues remaining to be solved, particularly when it comes to the pellicle. Another engineer explained that the 13.5nm radiation used by EUV gets absorbed by almost everything, so the interior of the machine needs to be a vacuum. With EUV, much of the power does not go through the reticle (mask), but instead heats it up. The pellicle helps protect the mask, but work still needs to be done to improve the amount of light that goes through the pellicle (transmission), as well as the longevity of the pellicle. This in turn will impact throughput, as well as the longevity of the masks and uptime of the overall machine.

As a result, Patton said, the company will initially offer a 7nm shrink with EUV, that will be used mostly for contacts and vias. This alone may provide a 10 to 15 percent increase in density without a big design investment. When the issues are resolved, Patton said, EUV can and will be used in many more layers. (Joel Hruska of ExtremeTech, who was also on the tour, has more detail here.)

Patton noted that ASML should get "tremendous credit" for pushing EUV as far as it has, and said it is an "incredible feat of engineering." When asked if GlobalFoundries is really committed to doing EUV, Caulfield responded that the firm has made a $600 million investment, which means "[they] have to do it."

FDX and the Roadmap for Future Chipmaking

In a wide-ranging discussion of where chipmaking is headed, Patton—who spent a long career working on chip technology for IBM—explained how the concept is changing as we reach the end of Moore's Law. He noted that in the early years of chip manufacturing, it was all about planar scaling of silicon CMOS. Then, from 2000-2010, the focus turned to new materials; now, much of the focus is on 3D transistors (the FinFETs used in most leading-edge processes today) and 3D stacking.

By 2020, he said, we will reach the limits of atomic dimensions, so we will need to focus on other ways of innovating, including new ways of designing transistors (such as nanowires replacing FinFETs), new kinds of substrates (such as the Fully Depleted Silicon-on-Insulator technology GlobalFoundries is developing); or new levels of system level integration (such as advanced packaging, silicon photonics, and embedded memory).

GlobalFoundries has two roadmaps it’s working on, Patton said. The first is based on the current FinFET technology, and is designed for high-performance devices. At GlobalFoundries, this means moving from the current 14nm process to a revision of the process it is calling 12nm, and then later this year to what it calls 7nm. Patton said this should be best suited to mobile application processors and high performance CPUs and GPUS, with GlobalFoundries promising up to a 40 percent improvement in device performance, and a 60 percent reduction in total power compared to the 14nm process. Equally compelling, it should reduce die costs by about 30 percent to as much as 45 percent over the previous generation.

In this portion of the roadmap, GlobalFoundries is on a similar course compared to the roadmaps of competing fabs, such as TSMC or Samsung.

But for other applications, the company is focusing on what it calls FDX, its brand for fully-depleted silicon-on-insulator technology. This is a planar technology, meaning that it doesn't use 3D transistors, and Patton said it provides a more cost-effective solution for low-end and mid-tier mobile processors, as well as processors for the Internet of Things and many automotive applications. While some of the research for this is happening at Malta, the FDX process is mostly organized in Dresden, Germany. Current work on this process is at what GlobalFoundries calls its 22nm FDX node; this is slated to move to a 12nm process next year.

Caulfield noted that "a shrink is not enough," and that to go to the next node, GlobalFoundries also has to offer more performance and bring real value to customers. He noted that the firm skipped 20nm and what others call 10nm to focus on 7nm and said that this node offers a 30 to 45 percent direct cost reduction compared with 14nm, offset somewhat by the need for more masks for the additional steps required by multi-patterning.

Caulfield noted that more than half of the firm's revenues remain on older process nodes, such as 28 and 40nm nodes. The firm’s Singapore plant is focused on 40nm and older processes, and Dresden manufactures on 22nm and older. Meanwhile, everything at Malta is focused on 14nm and newer processes.

On 7nm, Caulfield said, the company wants to be a "fast follower," while on FDX, it wants to be a "disruptive " factor in the market.

Patton noted that GlobalFoundries showed a 7nm test chip in 2015, which it developed with partners IBM and the Albany NanoTech Complex. At 5nm, the company has talked about nanosheets or gate-all-around transistors, and a focus on intra-module communication using 2.5D and 3D chip packaging on silicon interposers to connect different die and hybrid memory cubes. With its partners, it demonstrated a 5nm test chip last year.

For years, I’ve been impressed by how much the chipmaking industry has been able to improve. It's hard to think of another industry that has moved so far, and so fast—and the work by tool makers such as ASML and fabs such as GlobalFoundries is just incredible. The challenges they face at realizing even faster chips and denser designs are more and more difficult, but my visit reminded me of both the complexity of the cutting-edge processes involved and the progress that we continue to see.