Wednesday, February 16, 2011

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  1. Research and Design of Multi-Rate 850nm SFP Transceiver Based on VCSEL
    02/16 08:30

wowgolduse: Cataclysm Welcome to the end of days, Azeroth style http://j.mp/ecVNKp

02/14 05:46
wowgolduse: Cataclysm Welcome to the end of days, Azeroth style http://j.mp/ecVNKp

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02/12 01:59
world of Warcraft set MMOG standards http://bit.ly/gSinxm www.wowgold-use.com

The Main Changes about Death Knights in Patch4.0.6

02/16 19:51
Death Knights Main Changes in Cataclysm Patach4.0.6

Research and Design of Multi-Rate 850nm SFP Transceiver Based on VCSEL

02/16 08:30
In this thesis, we will research and design the optical transceiver module based on VCSEL(Vertical Cavity Surface Emitting Laser), which targeted for the Small Form Factor Pluggable(SFP) Multisource Agreement (MSA) market and other high-speed optical transceiver applications. In the first part of this thesis, the history, status and development of fiber-optic communication system are introduced.In the second part , we study the theory of optical transceiver module in the digital fiber-optical communication system . It is devided into two parts : the transmitter and the receiver .Transmitter is the device which changes electrical pulse signal into optical pulse signal , and then transmit the optical signal in wave form by laser diode or light-emitting diode. The elementary circuit of the transmitter is made up of code transform circuit , laser driver circuit and laser diode . But to perfect the system performance , some accessorial circuits are necessary , such as automatic power control circuit , automatic temperature control circuit and protective circuit etc .Optical receiver is used to transform the optical pulse signal received from fiber-optic into current pulse signal by photoemission , and the output current signal is amplified . After equilibrium and regeneration , the current pulse signal reverts to standard digital pulse signal . The elementary circuit of the receiver is made up of PIN photodiode , pre-amplifier, main amplifier , automatic gain control and regeneration circuit .Designing the optical transceiver module is the primary part of this thesis . In this part , the contents contain the choice of chip and component , parameter setting , circuit diagram designing , printed circuit board making and interface and encapsulation designing .Laser diode we used here is 850nm VCSEL(Vertical Cavity Surface Emitting Laser) produced by integrated optoelectronics lab of JiLin university. The chips we select are the production of MAXIM corporation of U.S.A., including MAX3740, MAX3744, MAX3748, DS1859.The MAX3740 is a high-speed VCSEL driver for small-form-factor (SFF) and small-form-factor pluggable (SFP) fiber optic LAN transmitters. It contains a bias generator, a laser modulator, and comprehensive safety features. The automatic power control (APC) adjusts the VCSEL bias current to maintain average optical power over changes in temperature and VCSEL properties.The MAX3740 can switch up to 15mA of VCSEL modulation current and source up to 15mA of bias current. The MAX3740 interfaces with the Dallas DS1859 to meet the SFF-8472 timing and diagnostic requirements.The MAX3740 safety circuitry detects faults that could cause hazardous light levels and disables the VCSEL output. The safety circuits are compliant with SFF and SFP multisource agreements (MSA).The receiver section is designed using the MAX3748 limiting amplifier (LA) and MAX3744 transimpedance amplifier (TIA). Here we encapsulate the MAX3744 and a PIN photodiode in a TO can, called ROSA—Receiver Optical Sub-Assembly. Using the MAX3744 with the MAX3748 allows RSSI monitoring while using a common 4-pin TO header. The received signal strength indicator (RSSI) is measured inside the MAX3744 and is sent to the MAX3748 limiting amplifier through the common mode voltage of the TIA outputs. The MAX3748 senses this voltage and converts it to a ground-referenced output that can then be monitored by the DS1859 digital resistor. To use this feature, the MAX3748 must be DC coupled to the MAX3744 TIA.The DS1859 Dual Temperature-Controlled NV Variable Res- istor consists of two 50k. 256-position variable resistors, a "dire- ct-to-digital" temperature sensor, three external voltage monitors, and one internal voltage monitor for VCC. The DS1859 is comp- liant with SFF-8472 requirements and provides internal calibrati- on. The device provides temperature compensation to the bias and modulation currents by changing the resistance as a function of temperature using look-up tables . The variable resistors' settings are stored in<br>




Alone with the improvement of the information construction in our country, the network becomes a important implement of information exchange more and more, impacted on every fields of society life; due to the TCP/IP congenital defect, lawless users in the network are likely to threaten on the network security seriously at any moment; especially in the electron government affair system construction, information exchange safely and conveniently between the external net、 the internal net and the private net is a problem needed to solve urgently. However, many security defense measures at the present are still in the superficial phase, so a depth defense system considered all factors synthetically—"a isolated secure gateway shielded subnet" emerges as the times require.Firstly, the paper presents the "physical isolation" concept and technology related in the domestic and overseas area these days, points out that the secure gateway is the best solution; then gives the general description about the secure gateway collectively, include the key technology 、 system and structure about the secure gateway; and educes the main work in the task thereby—the design of embedded small isolation secure gateway shielded subnet, summarizes its idea and scheme—a single host computer + special FPGA circuit board in the bottom layer; the main work in the paper emphasizes on the design of the module grade and the simulation verification of special FPGA circuit board about the design of the hardware system; the paper talks about the design thought about the author in the detail particularly about the FPGA module circuit in the bottom layer of the secure gateway and testifies the modules "function combined with the simulation graph, in the end , sums up the paper entirely.<br>



With the extensive application of Internet, the requirement for multimedia communications grows more and more rapidly. The appearance of MPEG-4 standard has met the needs for the current development of multimedia application . MPEG-4 file format, that is MP4 file format, has been defined in the MPKG-4 standard; and some standards about MPEG-4 payload format in IP network have also been proposed, but practical packetisation method on MP4 file in streaming media transmission of IP network hasn" t been provided. Faced with wide use of Internet, it is especially urgent and practical to make some research on MPEG-4 file packetisation method in IP network.It is emphasized in this paper that MPEG-4 encapsulation and packetisation method at the point of server based on RTP in streaming media transmission of IP network. Firstly, MPEG-4 architecture framework and existent encapsulation method about MPEG-4 based on RTP have been introduced, and MP4 file format has been analyzed in detail. Packetisation solution on MPEG-4 synchronization layer based on RTP has been particularly designed; then MP4 file has been analyzed by using C language and Linux operating system, both media data and synchronization information have been retrieved. All is for right and efficient transmission of MPEG-4 media data. Finally, it gives emulation validation on the solution, and it has been proved feasible.<br>

SFP SFP+ GLC-SX-MM
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